Computer organization and architecture : designing for performance /
William Stallings.
7th ed.
Upper Saddle River, NJ : Pearson Prentice Hall, c2006.
xiv, 778 p. : ill. ; 25 cm.
More Details
Upper Saddle River, NJ : Pearson Prentice Hall, c2006.
catalogue key
Includes bibliographical references (p. 751-762) and index.
A Look Inside
About the Author
Author Affiliation
WILLIAM STALLINGS has made a unique contribution to understanding the broad sweep of technical developments in computer networking and computer architecture. He has authored 17 titles, plus revised editions, for a total of 37 books on various aspects of these subjects. He has three times received the award for best Computer Science Textbook of the Year from the Text and Academic Authors Association (Computer Organization and Architecture, Prentice Hall, 1996; Data and Computer Communications, Prentice Hall, 1997; Operating Systems, Prentice Hall, 1998). In over 20 years in the field, Dr. Stallings has been a technical contributor, technical manager and an executive with several high-technology firms. Currently he is an independent consultant whose clients have included computer and networking manufacturers and customers, software development firms and leading-edge government research institutions. Dr. Stallings is a frequent lecturer and a regular contributor to technical journals and trade publications. Dr. Stallings holds a Ph.D. from MIT in computer science and a B.S. from Notre Dame in electrical engineering.
Long Description
Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors Association, including the current edition: (seventh edition, 2006; sixth edition, 2003; fifth edition, 2000; third edition, 1996) With up-to-date coverage of modern architectural approaches, this new edition provides a thorough discussion of the fundamentals of computer organization and architecture, as well as the critical role of performance in driving computer design. Coverage is supported by a wealth of concrete examples emphasizing modern RISC, CISC, and superscalar systems. Access valuable resources via the Prentice Hall page or directly at the author's text specific website Visit Stallings Computer Science Student Resource Site:
Main Description
With up-to-date coverage of modern architectural approaches, this handbook provides a thorough discussion of the fundamentals of computer organization and architecture, as well as the critical role of performance in driving computer design.Captures the fieldrs"s continued innovations and improvements, with input from active practitioners. Reviews the two most prevalent approaches: superscalar, which has come to dominate the microprocessor design field, including the widely used Pentium; and EPIC, seen in the IA-64 architecture of Intel's Itanium. Views systems from both the architectural and organizational perspectives. Includes coverage of critical topics, such as bus organization, computer arithmetic, I/O modules, RISC, memory, and parallel processors.For professionals in computer product marketing or information system configuration and maintenance.
Bowker Data Service Summary
Emphasising both fundamental principles and the critical role of performance in driving computer design, this book provides a comprehensive presentation of the organisation and architecture of modern computers.
Table of Contents
Web Sitep. vi
Prefacep. ix
Overviewp. 1
Introductionp. 3
Organization and Architecturep. 5
Structure and Functionp. 6
Outline of the Bookp. 12
Internet and Web Resourcesp. 15
Computer Evolution and Performancep. 17
A Brief History of Computersp. 19
Designing for Performancep. 39
Pentium and PowerPC Evolutionp. 43
Recommended Reading and Web Sitesp. 46
Problemsp. 47
The Computer Systemp. 49
System Busesp. 51
Computer Componentsp. 53
Computer Functionp. 56
Interconnection Structuresp. 69
Bus Interconnectionp. 71
PCIp. 80
Recommended Reading and Web Sitesp. 89
Problemsp. 90
Timing Diagramsp. 92
Internal Memoryp. 95
Computer Memory System Overviewp. 97
Semiconductor Main Memoryp. 103
Cache Memoryp. 117
Pentium II and PowerPC Cache Organizationsp. 132
Advanced DRAM Organizationp. 137
Recommended Reading and Web Sitesp. 142
Problemsp. 143
Performance Characteristics of Two-Level Memoriesp. 145
External Memoryp. 153
Magnetic Diskp. 155
RAIDp. 163
Optical Memoryp. 172
Magnetic Tapep. 177
Recommended Reading and Web Sitesp. 178
Problemsp. 179
Input/Outputp. 181
External Devicesp. 184
I/O Modulesp. 188
Programmed I/Op. 191
Interrupt-Driven I/Op. 195
Direct Memory Accessp. 203
I/O Channels and Processorsp. 207
The External Interface: SCSI and FireWirep. 209
Recommended Reading and Web Sitesp. 223
Problemsp. 224
Operating System Supportp. 227
Operating System Overviewp. 229
Schedulingp. 241
Memory Managementp. 247
Pentium II and PowerPC Memory Managementp. 259
Recommended Reading and Web Sitesp. 268
Problemsp. 269
The Central Processing Unitp. 271
Computer Arithmeticp. 273
The Arithmetic and Logic Unit (ALU)p. 275
Integer Representationp. 276
Integer Arithmeticp. 282
Floating-Point Representationp. 298
Floating-Point Arithmeticp. 305
Recommended Reading and Web Sitesp. 314
Problemsp. 315
Number Systemsp. 317
Instruction Sets: Characteristics and Functionsp. 323
Machine Instruction Characteristicsp. 325
Types of Operandsp. 331
Pentium II and PowerPC Data Typesp. 333
Types of Operationsp. 336
Pentium II and PowerPC Operation Typesp. 349
Assembly Languagep. 358
Recommended Readingp. 360
Problemsp. 360
Stacksp. 364
Little-, Big-, and Bi-Endianp. 368
Instruction Sets: Addressing Modes and Formatsp. 373
Addressingp. 375
Pentium and PowerPC Addressing Modesp. 382
Instruction Formatsp. 388
Pentium and PowerPC Instruction Formatsp. 397
Recommended Readingp. 402
Problemsp. 402
CPU Structure and Functionp. 405
Processor Organizationp. 407
Register Organizationp. 409
The Instruction Cyclep. 414
Instruction Pipeliningp. 419
The Pentium Processorp. 434
The PowerPC Processorp. 443
Recommended Readingp. 450
Problemsp. 451
Reduced Instruction Set Computersp. 455
Instruction Execution Characteristicsp. 458
The Use of a Large Register Filep. 462
Compiler-Based Register Optimizationp. 467
Reduced Instruction Set Architecturep. 469
RISC Pipeliningp. 476
MIPS R4000p. 480
SPARCp. 488
The RISC versus CISC Controversyp. 494
Recommended Readingp. 495
Problemsp. 496
Instruction-Level Parallelism and Superscalar Processorsp. 499
Overviewp. 501
Design Issuesp. 506
Pentium IIp. 515
PowerPCp. 521
MIPS R10000p. 529
UltraSPARC-IIp. 531
IA-64/Mercedp. 534
Recommended Readingp. 545
Problemsp. 546
The Control Unitp. 551
Control Unit Operationp. 553
Micro-operationsp. 555
Control of the Processorp. 561
Hardwired Implementationp. 573
Recommended Readingp. 575
Problemsp. 576
Microprogrammed Controlp. 577
Basic Conceptsp. 579
Microinstruction Sequencingp. 588
Microinstruction Executionp. 593
TI 8800p. 605
Applications of Microprogrammingp. 615
Recommended Readingp. 616
Problemsp. 617
Parallel Organizationp. 619
Parallel Processingp. 621
Multiple Processor Organizationsp. 623
Symmetric Multiprocessorsp. 625
Cache Coherence and the MESI Protocolp. 635
Clustersp. 642
Nonuniform Memory Accessp. 646
Vector Computationp. 650
Recommended Readingp. 663
Problemsp. 664
Digital Logicp. 669
Boolean Algebrap. 670
Gatesp. 672
Combinational Circuitsp. 675
Sequential Circuitsp. 696
Problemsp. 707
Projects for Teaching Computer Organization and Architecturep. 709
Research Projectsp. 710
Simulation Projectsp. 710
Reading/Report Assignmentsp. 712
Glossaryp. 713
Referencesp. 725
Indexp. 739
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